Integrated circuits (IC) devices are usually fabricated on a semiconductor wafer which has a plurality of IC device die each including a plurality of bond pads on its top surface that connect to various nodes in the device, such as for signal input, signal output and power supply nodes. The bond pads are generally connected by a bond wire or other electrically conductive structure to permit utilization of the IC die. Known methods for connecting an IC device to a lead frame or other support include wire bonding, Tape Automated Bonding (TAB), Controlled Collapse Chip Connection (C4) or bump bonding, and the use of electrically conductive adhesives.
To provide a reliable and low resistance attachment to the bond pad surface, such as by bond wires, some packaging technologies have used multi-layered bond pads having a top metal layer that is both electrically conductive and resistant to oxidation to provide high reliability (good corrosion performance) and high performance (low resistance), such as for wire bonding to the bond pads. One such bond pad arrangement deposits a dielectric passivation layer(s) over an oxidizable uppermost metal interconnect layer such as copper or aluminum, and then forms a trench including dielectric sidewalls from the passivation layer. A barrier layer comprising a refractory metal (e.g., Ta, TaN or Ti) is then deposited that lines the passivation sidewalls which provides good adhesion to the passivation material. A multi-layer metal stack is formed on the barrier layer which can comprise palladium (Pd) as the final (top) layer on a nickel layer over the uppermost metal interconnect layer to provide a stable surface for wire bonding. Pd being a platinum group metal has a low propensity for oxidation and is a good outer capping layer for the bond pad to prevent chemical attack of the oxidizable uppermost metal interconnect layer material thereunder.